1. Field of the Invention
This invention relates to microelectronic devices incorporating capacitors. More particularly, it is concerned with the method and structure for forming a capacitor of reduced thickness for improved wafer topography.
2. Description of the Prior Art
As the dimensions of microelectronic devices decrease, an increasingly critical concern is the topography of the wafer. In particular, it is important that the topographical profile be lowered as much as possible in order to facilitate lithographic techniques thereat. That is to say, a lowered topographical profile generally tends to diminish depth-of-focus problems encountered with lithographic techniques. Within this context, capacitors sited near the top surfaces of wafers need smaller vertical dimensions. But simply reducing the thickness of a capacitor creates its own set of problems. In particular, as the thickness of the capacitive plates is decreased, the likelihood that a given capacitive layer will be etched completely through is increased. For example, a capacitor located on a substrate typically has other materials such as insulators positioned above it. Therefore it is often necessary to etch contacts in order to form electrical connection to the capacitor plates. If the plates are thin, there is the danger of etching through one or more of the plates. Etching at or close to the site of the capacitor might also be required for any number of other purposes.
Thus, the thickness of the capacitor and its components is obviously important. Yet the potential for decreasing the thickness of a capacitor is not infinite, but is controlled by the need for sufficient thickness for etching purposes. Typically, the thickness for etching purposes is a more limiting constraint than the thickness required for electrical conductivity of the capacitor.
In the context of the current etching technology, the thickness required for etching purposes depends upon the material used, but is a minimum of about 3000 angstroms for polysilicon to ensure that etches done thereover do not completely etch through the capacitor or some component thereof.
The amount of thickness required for safe etching will undoubtedly vary as etching technology changes and improves, as a function of the selectivity of the materials being etched and the particular structure and application of the capacitor in question. However, the general requirement that sufficient capacitor thickness be provided for a given application will remain, despite the changes in these parameters.
What is needed, then, is a method which allows for reducing the depth of the functional portions of the capacitor yet provides sufficient thickness at the portions of the capacitor over which etching will occur, e.g. where contacts will be formed.